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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Diego_Garcia>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Javier_Granizo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Luis_Hern%E2%88%9A%C2%B0ndez_0003>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FAICAS57966.2023.10168617>
foaf:homepage <https://doi.org/10.1109/AICAS57966.2023.10168617>
dc:identifier DBLP conf/aicas/GarciaGH23 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FAICAS57966.2023.10168617 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label Validation of a CMOS SNN network based on a time-domain threshold neuron circuit achieving 114.90 pJ/inference on MNIST. (xsd:string)
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Luis_Hern%E2%88%9A%C2%B0ndez_0003>
swrc:pages 1-5 (xsd:string)
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swrc:series <https://dblp.l3s.de/d2r/resource/conferences/aicas>
dc:title Validation of a CMOS SNN network based on a time-domain threshold neuron circuit achieving 114.90 pJ/inference on MNIST. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document