A top-down, mixed-level design methodology for CT BP őĒő£ modulator using verilog-A.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/apccas/ChuYLT08
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/apccas/ChuYLT08
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chi-Wai_Leng
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chien-Hung_Tsai
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chun-Hung_Yang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hung-Yuan_Chu
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FAPCCAS.2008.4746289
>
foaf:
homepage
<
https://doi.org/10.1109/APCCAS.2008.4746289
>
dc:
identifier
DBLP conf/apccas/ChuYLT08
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FAPCCAS.2008.4746289
(xsd:string)
dcterms:
issued
2008
(xsd:gYear)
rdfs:
label
A top-down, mixed-level design methodology for CT BP őĒő£ modulator using verilog-A.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chi-Wai_Leng
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chien-Hung_Tsai
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chun-Hung_Yang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hung-Yuan_Chu
>
swrc:
pages
1390-1393
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/apccas/2008
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/apccas/ChuYLT08/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/apccas/ChuYLT08
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/apccas/apccas2008.html#ChuYLT08
>
rdfs:
seeAlso
<
https://doi.org/10.1109/APCCAS.2008.4746289
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/apccas
>
dc:
title
A top-down, mixed-level design methodology for CT BP őĒő£ modulator using verilog-A.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document