A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video Encoding.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/apccas/KaoKLHLHL06
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A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video Encoding.
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A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video Encoding.
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