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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/apccas/LiangTGTC06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Cheng-Chi_Tai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Cher-Shiung_Tsai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dong-Shong_Liang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kwang-Jow_Gan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yaw-Hwang_Chen>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FAPCCAS.2006.342428>
foaf:homepage <https://doi.org/10.1109/APCCAS.2006.342428>
dc:identifier DBLP conf/apccas/LiangTGTC06 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FAPCCAS.2006.342428 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label Design of AND and NAND Logic Gate Using NDR-BASED Circuit Suitable for CMOS Process. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Cheng-Chi_Tai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Cher-Shiung_Tsai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dong-Shong_Liang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kwang-Jow_Gan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yaw-Hwang_Chen>
swrc:pages 1325-1328 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/apccas/2006>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/apccas/LiangTGTC06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/apccas/LiangTGTC06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/apccas/apccas2006.html#LiangTGTC06>
rdfs:seeAlso <https://doi.org/10.1109/APCCAS.2006.342428>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/apccas>
dc:title Design of AND and NAND Logic Gate Using NDR-BASED Circuit Suitable for CMOS Process. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document