A 1-kb Sub-1 fJ/b Per Access CAM Design Using 40-nm CMOS Process. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Chua-Chin_Wang>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Ralph_Gerard_B._Sangalang>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Wei-Zhen_Chen>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FAPCCAS60141.2023.00023>
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dc:identifier	DOI doi.org%2F10.1109%2FAPCCAS60141.2023.00023 (xsd:string)
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rdfs:label	A 1-kb Sub-1 fJ/b Per Access CAM Design Using 40-nm CMOS Process. (xsd:string)
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foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Wei-Zhen_Chen>
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dc:title	A 1-kb Sub-1 fJ/b Per Access CAM Design Using 40-nm CMOS Process. (xsd:string)
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