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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/applepies/BarbirottaAMCJM23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Abdallah_Cheikh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Antonio_Mastrandrea>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Francesco_Menichelli>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Marcello_Barbirotta>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Marco_Angioli>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mauro_Olivieri>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Saeid_Jamili>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-031-48121-5%5F6>
foaf:homepage <https://doi.org/10.1007/978-3-031-48121-5_6>
dc:identifier DBLP conf/applepies/BarbirottaAMCJM23 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-031-48121-5%5F6 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label Single Event Transient Reliability Analysis on a Fault-Tolerant RISC-V Microprocessor Design. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Abdallah_Cheikh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Antonio_Mastrandrea>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Francesco_Menichelli>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Marcello_Barbirotta>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Marco_Angioli>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mauro_Olivieri>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Saeid_Jamili>
swrc:pages 42-48 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1007/978-3-031-48121-5_6>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/applepies>
dc:title Single Event Transient Reliability Analysis on a Fault-Tolerant RISC-V Microprocessor Design. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document