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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/appt/CaoJH03>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mingzeng_Hu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhenzhou_Ji>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhiyang_Cao>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-39425-9%5F11>
foaf:homepage <https://doi.org/10.1007/978-3-540-39425-9_11>
dc:identifier DBLP conf/appt/CaoJH03 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-39425-9%5F11 (xsd:string)
dcterms:issued 2003 (xsd:gYear)
rdfs:label A VLSI Architecture Design of 1-D DWT. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mingzeng_Hu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhenzhou_Ji>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhiyang_Cao>
swrc:pages 104-108 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/appt/2003>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/appt/CaoJH03/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/appt/CaoJH03>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/appt/appt2003.html#CaoJH03>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-39425-9_11>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/appt>
dc:title A VLSI Architecture Design of 1-D DWT. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document