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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nikolaos_Vassiliadis>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Spiridon_Nikolaidis_0001>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-78610-8%5F20>
foaf:homepage <https://doi.org/10.1007/978-3-540-78610-8_20>
dc:identifier DBLP conf/arc/VassiliadisTN08 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-78610-8%5F20 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label ARISE Machines: Extending Processors with Hybrid Accelerators. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/George_Theodoridis>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nikolaos_Vassiliadis>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Spiridon_Nikolaidis_0001>
swrc:pages 195-206 (xsd:string)
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owl:sameAs <http://dblp.rkbexplorer.com/id/conf/arc/VassiliadisTN08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/arc/arc2008.html#VassiliadisTN08>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-78610-8_20>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/arc>
dc:subject reconfigurable instruction set processor; coprocessor; custom unit; FPGA (xsd:string)
dc:title ARISE Machines: Extending Processors with Hybrid Accelerators. (xsd:string)
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rdf:type swrc:InProceedings
rdf:type foaf:Document