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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/arc/YazdaniGPD09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bernard_Pottier>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Catherine_Dezan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Samar_Yazdani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Thierry_Goubier>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-642-00641-8%5F30>
foaf:homepage <https://doi.org/10.1007/978-3-642-00641-8_30>
dc:identifier DBLP conf/arc/YazdaniGPD09 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-642-00641-8%5F30 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Optimizing Memory Access Latencies on a Reconfigurable Multimedia Accelerator: A Case of a Turbo Product Codes Decoder. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bernard_Pottier>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Catherine_Dezan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Samar_Yazdani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Thierry_Goubier>
swrc:pages 287-292 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/arc/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/arc/YazdaniGPD09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/arc/YazdaniGPD09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/arc/arc2009.html#YazdaniGPD09>
rdfs:seeAlso <https://doi.org/10.1007/978-3-642-00641-8_30>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/arc>
dc:title Optimizing Memory Access Latencies on a Reconfigurable Multimedia Accelerator: A Case of a Turbo Product Codes Decoder. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document