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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/arith/Beaumont-SmithBLL99>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrew_Beaumont-Smith>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Cheng-Chew_Lim>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Neil_Burgess>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/S._Lefrere>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FARITH.1999.762826>
foaf:homepage <https://doi.org/10.1109/ARITH.1999.762826>
dc:identifier DBLP conf/arith/Beaumont-SmithBLL99 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FARITH.1999.762826 (xsd:string)
dcterms:issued 1999 (xsd:gYear)
rdfs:label Reduced Latency IEEE Floating-Point Standard Adder Architectures. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrew_Beaumont-Smith>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Cheng-Chew_Lim>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Neil_Burgess>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/S._Lefrere>
swrc:pages 35- (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/arith/1999>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/arith/Beaumont-SmithBLL99/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/arith/Beaumont-SmithBLL99>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/arith/arith1999.html#Beaumont-SmithBLL99>
rdfs:seeAlso <https://doi.org/10.1109/ARITH.1999.762826>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/arith>
dc:subject floating-point, adder, arithmetic, VLSI. (xsd:string)
dc:title Reduced Latency IEEE Floating-Point Standard Adder Architectures. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document