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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/artcom/GhoshG09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anindya_Ghosh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Debapriyo_Ghosh>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FARTCom.2009.28>
foaf:homepage <https://doi.org/10.1109/ARTCom.2009.28>
dc:identifier DBLP conf/artcom/GhoshG09 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FARTCom.2009.28 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Optimization of Static Power, Leakage Power and Delay of Full Adder Circuit Using Dual Threshold MOSFET Based Design and T-Spice Simulation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anindya_Ghosh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Debapriyo_Ghosh>
swrc:pages 903-905 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/artcom/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/artcom/GhoshG09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/artcom/GhoshG09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/artcom/artcom2009.html#GhoshG09>
rdfs:seeAlso <https://doi.org/10.1109/ARTCom.2009.28>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/artcom>
dc:title Optimization of Static Power, Leakage Power and Delay of Full Adder Circuit Using Dual Threshold MOSFET Based Design and T-Spice Simulation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document