Low latency self-timed flow-through FIFOs. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/arvlsi/Brunvand95>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Erik_Brunvand>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FARVLSI.1995.515612>
foaf:homepage	<https://doi.org/10.1109/ARVLSI.1995.515612>
dc:identifier	DBLP conf/arvlsi/Brunvand95 (xsd:string)
dc:identifier	DOI doi.org%2F10.1109%2FARVLSI.1995.515612 (xsd:string)
dcterms:issued	1995 (xsd:gYear)
rdfs:label	Low latency self-timed flow-through FIFOs. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Erik_Brunvand>
swrc:pages	76-90 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/arvlsi/1995>
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owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/arvlsi/Brunvand95>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/arvlsi/arvlsi1995.html#Brunvand95>
rdfs:seeAlso	<https://doi.org/10.1109/ARVLSI.1995.515612>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/arvlsi>
dc:subject	asynchronous circuits; VLSI; field programmable gate arrays; CMOS logic circuits; self-timed flow-through FIFO; linear flow-through FIFO; parallel FIFO; tree FIFO; square FIFO; folded FIFO; low latency type (xsd:string)
dc:title	Low latency self-timed flow-through FIFOs. (xsd:string)
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