Interconnect-Dominated VLSI Design.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/arvlsi/GhoshMMR99
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Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/arvlsi/GhoshMMR99
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/C._Mark
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kenneth_Rose
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/P._Ghosh
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ramon_Mangaser
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FARVLSI.1999.756042
>
foaf:
homepage
<
https://doi.org/10.1109/ARVLSI.1999.756042
>
dc:
identifier
DBLP conf/arvlsi/GhoshMMR99
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FARVLSI.1999.756042
(xsd:string)
dcterms:
issued
1999
(xsd:gYear)
rdfs:
label
Interconnect-Dominated VLSI Design.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/C._Mark
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kenneth_Rose
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/P._Ghosh
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ramon_Mangaser
>
swrc:
pages
114-122
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/arvlsi/1999
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/arvlsi/GhoshMMR99/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/arvlsi/GhoshMMR99
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/arvlsi/arvlsi1999.html#GhoshMMR99
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ARVLSI.1999.756042
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/arvlsi
>
dc:
subject
Interconnects, Microprocessor Performance Estimation, Repeater Insertion, Floorplanning, VLSI Design
(xsd:string)
dc:
title
Interconnect-Dominated VLSI Design.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document