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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/arvlsi/HassVB01>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jack_Venbrux>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/K._Joseph_Hass>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Prakash_Bhatia>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FARVLSI.2001.915552>
foaf:homepage <https://doi.org/10.1109/ARVLSI.2001.915552>
dc:identifier DBLP conf/arvlsi/HassVB01 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FARVLSI.2001.915552 (xsd:string)
dcterms:issued 2001 (xsd:gYear)
rdfs:label Logic Design Considerations for 0.5-Volt CMOS. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jack_Venbrux>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/K._Joseph_Hass>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Prakash_Bhatia>
swrc:pages 75-87 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/arvlsi/2001>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/arvlsi/HassVB01/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/arvlsi/HassVB01>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/arvlsi/arvlsi2001.html#HassVB01>
rdfs:seeAlso <https://doi.org/10.1109/ARVLSI.2001.915552>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/arvlsi>
dc:title Logic Design Considerations for 0.5-Volt CMOS. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document