Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow-Control.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/arvlsi/KornarosKVK97
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Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow-Control.
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single-chip ATM switch, VLSI router, pipelined queue management, credit-based flow control
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Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow-Control.
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