Dynamic CMOS circuit techniques for delay and power reduction in parallel adders .
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/arvlsi/LindkvistA95
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/arvlsi/LindkvistA95
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hans_Lindkvist
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Per_Andersson
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FARVLSI.1995.515615
>
foaf:
homepage
<
https://doi.org/10.1109/ARVLSI.1995.515615
>
dc:
identifier
DBLP conf/arvlsi/LindkvistA95
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FARVLSI.1995.515615
(xsd:string)
dcterms:
issued
1995
(xsd:gYear)
rdfs:
label
Dynamic CMOS circuit techniques for delay and power reduction in parallel adders .
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hans_Lindkvist
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Per_Andersson
>
swrc:
pages
121-130
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/arvlsi/1995
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/arvlsi/LindkvistA95/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/arvlsi/LindkvistA95
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/arvlsi/arvlsi1995.html#LindkvistA95
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ARVLSI.1995.515615
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/arvlsi
>
dc:
subject
CMOS logic circuits; adders; parallel processing; digital arithmetic; VLSI; carry logic; logic design; delays; dynamic CMOS circuit techniques; delay reduction; power reduction; parallel adders; high-speed adders; Manchester-carry chains; clock/data precharged dynamic logic blocks; carry calculation trees; power consumption
(xsd:string)
dc:
title
Dynamic CMOS circuit techniques for delay and power reduction in parallel adders .
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document