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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/arvlsi/MonierHD95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jeremy_Dion>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Louis_Monier>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ramsey_W._Haddad>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FARVLSI.1995.515619>
foaf:homepage <https://doi.org/10.1109/ARVLSI.1995.515619>
dc:identifier DBLP conf/arvlsi/MonierHD95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FARVLSI.1995.515619 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Recursive layout generation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jeremy_Dion>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Louis_Monier>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ramsey_W._Haddad>
swrc:pages 172-184 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/arvlsi/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/arvlsi/MonierHD95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/arvlsi/MonierHD95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/arvlsi/arvlsi1995.html#MonierHD95>
rdfs:seeAlso <https://doi.org/10.1109/ARVLSI.1995.515619>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/arvlsi>
dc:subject circuit layout CAD; VLSI; microprocessor chips; BiCMOS digital integrated circuits; logic CAD; recursive layout generation; VLSI chips; layout directives; netlist description; seamless integration; hand-drawn layout; synthesized layout; overall layout; dense VLSI; microprocessor chips (xsd:string)
dc:title Recursive layout generation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document