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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/asap/BaeP95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jongwoo_Bae>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Viktor_K._Prasanna>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FASAP.1995.522921>
foaf:homepage <https://doi.org/10.1109/ASAP.1995.522921>
dc:identifier DBLP conf/asap/BaeP95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FASAP.1995.522921 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Synthesis of VLSI Architectures for Two-Dimensional Discrete Wavelet Transforms. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jongwoo_Bae>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Viktor_K._Prasanna>
swrc:pages 174- (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/asap/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/asap/BaeP95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/asap/BaeP95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/asap/asap1995.html#BaeP95>
rdfs:seeAlso <https://doi.org/10.1109/ASAP.1995.522921>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/asap>
dc:subject Two-Dimensional Discrete Wavelet Transforms, VLSI Architecture, Parallel I/O, Single Chip, Low Power (xsd:string)
dc:title Synthesis of VLSI Architectures for Two-Dimensional Discrete Wavelet Transforms. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document