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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/asap/GuoLWLB23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alexander_Warren>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ce_Guo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Joshua_M._Levine>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Peter_Brookes>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wayne_Luk>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FASAP57973.2023.00028>
foaf:homepage <https://doi.org/10.1109/ASAP57973.2023.00028>
dc:identifier DBLP conf/asap/GuoLWLB23 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FASAP57973.2023.00028 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label Co-Design of Algorithm and FPGA Accelerator for Conditional Independence Test. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alexander_Warren>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ce_Guo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Joshua_M._Levine>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Peter_Brookes>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wayne_Luk>
swrc:pages 102-109 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/asap/2023>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/asap/GuoLWLB23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/asap/GuoLWLB23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/asap/asap2023.html#GuoLWLB23>
rdfs:seeAlso <https://doi.org/10.1109/ASAP57973.2023.00028>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/asap>
dc:title Co-Design of Algorithm and FPGA Accelerator for Conditional Independence Test. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document