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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/asap/ShahrouziP17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Darshika_G._Perera>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/S._Navid_Shahrouzi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FASAP.2017.7995263>
foaf:homepage <https://doi.org/10.1109/ASAP.2017.7995263>
dc:identifier DBLP conf/asap/ShahrouziP17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FASAP.2017.7995263 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
rdfs:label An efficient embedded multi-ported memory architecture for next-generation FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Darshika_G._Perera>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/S._Navid_Shahrouzi>
swrc:pages 83-90 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1109/ASAP.2017.7995263>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/asap>
dc:title An efficient embedded multi-ported memory architecture for next-generation FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document