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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/asap/SunwooOAL95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Byungdug_Ahn>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kyungwoo_Lee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Myung_Hoon_Sunwoo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Soohwan_Ong>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FASAP.1995.522906>
foaf:homepage <https://doi.org/10.1109/ASAP.1995.522906>
dc:identifier DBLP conf/asap/SunwooOAL95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FASAP.1995.522906 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Design and Implementation of a Parallel Image Processor Chip for a SIMD Array Processor. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Byungdug_Ahn>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kyungwoo_Lee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Myung_Hoon_Sunwoo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Soohwan_Ong>
swrc:pages 66-75 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/asap/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/asap/SunwooOAL95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/asap/SunwooOAL95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/asap/asap1995.html#SunwooOAL95>
rdfs:seeAlso <https://doi.org/10.1109/ASAP.1995.522906>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/asap>
dc:subject VLSI Design, Image Processing, SIMD Array Processors, VLSI Architectures, ASIC Chip (xsd:string)
dc:title Design and Implementation of a Parallel Image Processor Chip for a SIMD Array Processor. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document