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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/asap/VishwanathO96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohan_Vishwanath>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Robert_Michael_Owens>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FASAP.1996.542814>
foaf:homepage <https://doi.org/10.1109/ASAP.1996.542814>
dc:identifier DBLP conf/asap/VishwanathO96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FASAP.1996.542814 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label A Common Architecture For The DWT and IDWT. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohan_Vishwanath>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Robert_Michael_Owens>
swrc:pages 193-198 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/asap/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/asap/VishwanathO96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/asap/VishwanathO96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/asap/asap1996.html#VishwanathO96>
rdfs:seeAlso <https://doi.org/10.1109/ASAP.1996.542814>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/asap>
dc:subject wavelet transforms; digital signal processing chips; discrete wavelet transform; inverse discrete wavelet transform; filter bank; single chip; j'th octave (xsd:string)
dc:title A Common Architecture For The DWT and IDWT. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document