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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/asiams/RahimRAAA08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ab_Al-Hadi_Ab_Rahman>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hasliza_A._Rahim>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Muhammad_Imran_Ahmad>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/R._Badlishah_Ahmad>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wan_Nur_Suryani_Firuz_Wan_Ariffin>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FAMS.2008.117>
foaf:homepage <https://doi.org/10.1109/AMS.2008.117>
dc:identifier DBLP conf/asiams/RahimRAAA08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FAMS.2008.117 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label The Performance Study of Two Genetic Algorithm Approaches for VLSI Macro-Cell Layout Area Optimization. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ab_Al-Hadi_Ab_Rahman>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hasliza_A._Rahim>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Muhammad_Imran_Ahmad>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/R._Badlishah_Ahmad>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wan_Nur_Suryani_Firuz_Wan_Ariffin>
swrc:pages 207-212 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/asiams/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/asiams/RahimRAAA08/dblp>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/asiams/ams2008.html#RahimRAAA08>
rdfs:seeAlso <https://doi.org/10.1109/AMS.2008.117>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/asiams>
dc:subject Genetic Algorithm, Simple Genetic Algorithm, Steady-State Algorithm, VLSI, Area Optimization (xsd:string)
dc:title The Performance Study of Two Genetic Algorithm Approaches for VLSI Macro-Cell Layout Area Optimization. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document