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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jianye_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xuqiang_Zheng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ziqiang_Wang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FASICON.2015.7516921>
foaf:homepage <https://doi.org/10.1109/ASICON.2015.7516921>
dc:identifier DBLP conf/asicon/LvZWWL15 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FASICON.2015.7516921 (xsd:string)
dcterms:issued 2015 (xsd:gYear)
rdfs:label A 50Gb/s low power PAM4 SerDes transmitter with 4-tap FFE and high linearity output voltage in 65nm CMOS technology. (xsd:string)
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xuqiang_Zheng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ziqiang_Wang>
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dc:title A 50Gb/s low power PAM4 SerDes transmitter with 4-tap FFE and high linearity output voltage in 65nm CMOS technology. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document