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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/asicon/WangWFZ17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Huihong_Zhang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mingbo_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pengjun_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Qiang_Fu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FASICON.2017.8252492>
foaf:homepage <https://doi.org/10.1109/ASICON.2017.8252492>
dc:identifier DBLP conf/asicon/WangWFZ17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FASICON.2017.8252492 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
rdfs:label Delay and area optimization for FPRM circuits based on MSPSO algorithm. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Huihong_Zhang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mingbo_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pengjun_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Qiang_Fu>
swrc:pages 379-382 (xsd:string)
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owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/asicon/WangWFZ17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/asicon/WangWFZ17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/asicon/asicon2017.html#WangWFZ17>
rdfs:seeAlso <https://doi.org/10.1109/ASICON.2017.8252492>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/asicon>
dc:title Delay and area optimization for FPRM circuits based on MSPSO algorithm. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document