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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/aspdac/BaiZZCYC22>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jianli_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jun_Yu_0010>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Peng_Zou>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xiqiong_Bai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yao-Wen_Chang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ziran_Zhu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FASP-DAC52403.2022.9712516>
foaf:homepage <https://doi.org/10.1109/ASP-DAC52403.2022.9712516>
dc:identifier DBLP conf/aspdac/BaiZZCYC22 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FASP-DAC52403.2022.9712516 (xsd:string)
dcterms:issued 2022 (xsd:gYear)
rdfs:label Voronoi Diagram Based Heterogeneous Circuit Layout Centerline Extraction for Mask Verification. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jianli_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jun_Yu_0010>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Peng_Zou>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xiqiong_Bai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yao-Wen_Chang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ziran_Zhu>
swrc:pages 172-177 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1109/ASP-DAC52403.2022.9712516>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/aspdac>
dc:title Voronoi Diagram Based Heterogeneous Circuit Layout Centerline Extraction for Mask Verification. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document