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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/aspdac/HeSLC023>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ao_Shen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hao_Yu_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Qiufeng_Li>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Quan_Cheng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zicheng_He>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F3566097.3567871>
foaf:homepage <https://doi.org/10.1145/3566097.3567871>
dc:identifier DBLP conf/aspdac/HeSLC023 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F3566097.3567871 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label Agile Hardware and Software Co-Design for RISC-V-Based Multi-Precision Deep Learning Microprocessor. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ao_Shen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hao_Yu_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Qiufeng_Li>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Quan_Cheng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zicheng_He>
swrc:pages 490-495 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/aspdac/2023>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/aspdac/HeSLC023/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/aspdac/HeSLC023>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/aspdac/aspdac2023.html#HeSLC023>
rdfs:seeAlso <https://doi.org/10.1145/3566097.3567871>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/aspdac>
dc:title Agile Hardware and Software Co-Design for RISC-V-Based Multi-Precision Deep Learning Microprocessor. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document