The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/aspdac/HouWH99
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1999
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The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance.
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Parasitic Capacitance, Boundary Element Method, Hierarchical h-Adaptive Computation, VLSI
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The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance.
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