Single-chip multi-processor integrating quadruple 8-way VLIW processors with interface timing analysis considering power supply noise.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/aspdac/ImaiIMKS06
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Single-chip multi-processor integrating quadruple 8-way VLIW processors with interface timing analysis considering power supply noise.
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Single-chip multi-processor integrating quadruple 8-way VLIW processors with interface timing analysis considering power supply noise.
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