Runtime leakage power estimation technique for combinational circuits.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/aspdac/LinS07
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2007
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Runtime leakage power estimation technique for combinational circuits.
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subthreshold leakage analysis, runtime leakage power estimation technique, combinational circuits, dynamic estimation methods, static estimation methods, SPICE simulations, error estimation
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Runtime leakage power estimation technique for combinational circuits.
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