Exploiting parallelism of imperfect nested loops with sibling inner loops on coarse-grained reconfigurable architectures.
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/aspdac/LinYLW16
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Leibo_Liu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shaojun_Wei
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shouyi_Yin
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Xinhan_Lin
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FASPDAC.2016.7428054
>
foaf:
homepage
<
https://doi.org/10.1109/ASPDAC.2016.7428054
>
dc:
identifier
DBLP conf/aspdac/LinYLW16
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FASPDAC.2016.7428054
(xsd:string)
dcterms:
issued
2016
(xsd:gYear)
rdfs:
label
Exploiting parallelism of imperfect nested loops with sibling inner loops on coarse-grained reconfigurable architectures.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Leibo_Liu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shaojun_Wei
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shouyi_Yin
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Xinhan_Lin
>
swrc:
pages
456-461
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/aspdac/2016
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/aspdac/LinYLW16/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/aspdac/LinYLW16
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/aspdac/aspdac2016.html#LinYLW16
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ASPDAC.2016.7428054
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/aspdac
>
dc:
title
Exploiting parallelism of imperfect nested loops with sibling inner loops on coarse-grained reconfigurable architectures.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document