Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/aspdac/MaLCHRDZ07
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2007
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Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning.
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graph-based approach, microarchitecture pipelining optimization, throughput-aware floorplanning, block pipelining, interconnect pipelining, mixed integer linear programming, graph-based algorithm, wire pipelining
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Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning.
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