A 3D prototyping chip based on a wafer-level stacking technology. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Nobuaki_Miyakawa>
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dc:title	A 3D prototyping chip based on a wafer-level stacking technology. (xsd:string)
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