DFM reality in sub-nanometer IC design.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/aspdac/VergheseH07
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2007
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DFM reality in sub-nanometer IC design.
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EDA solutions, DFM, subnanometer IC design, catastrophic failures, parametric failures, design for manufacturing, systematic manufacturing variations, subnanometer manufacturing variations
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DFM reality in sub-nanometer IC design.
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