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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/aspdac/ZhouSS09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Karthikk_Sridharan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pingqiang_Zhou>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sachin_S._Sapatnekar>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FASPDAC.2009.4796477>
foaf:homepage <https://doi.org/10.1109/ASPDAC.2009.4796477>
dc:identifier DBLP conf/aspdac/ZhouSS09 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FASPDAC.2009.4796477 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Congestion-aware power grid optimization for 3D circuits using MIM and CMOS decoupling capacitors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Karthikk_Sridharan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pingqiang_Zhou>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sachin_S._Sapatnekar>
swrc:pages 179-184 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/aspdac/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/aspdac/ZhouSS09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/aspdac/ZhouSS09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/aspdac/aspdac2009.html#ZhouSS09>
rdfs:seeAlso <https://doi.org/10.1109/ASPDAC.2009.4796477>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/aspdac>
dc:title Congestion-aware power grid optimization for 3D circuits using MIM and CMOS decoupling capacitors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document