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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/asscc/HossainNEHA16>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/A._K._M._Delwar_Hossain>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Amlan_Nag>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Aurangozeb>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masum_Hossain>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Waleed_El-Halwagy>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FASSCC.2016.7844142>
foaf:homepage <https://doi.org/10.1109/ASSCC.2016.7844142>
dc:identifier DBLP conf/asscc/HossainNEHA16 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FASSCC.2016.7844142 (xsd:string)
dcterms:issued 2016 (xsd:gYear)
rdfs:label Fractional-N DPLL based low power clocking architecture for 1-14 Gb/s multi-standard transmitter. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/A._K._M._Delwar_Hossain>
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Aurangozeb>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masum_Hossain>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Waleed_El-Halwagy>
swrc:pages 89-92 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/asscc/2016>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/asscc/asscc2016.html#HossainNEHA16>
rdfs:seeAlso <https://doi.org/10.1109/ASSCC.2016.7844142>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/asscc>
dc:title Fractional-N DPLL based low power clocking architecture for 1-14 Gb/s multi-standard transmitter. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document