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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/asscc/ZhuZYYWS23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Houjun_Sun>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jian_Zhang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jiazhi_Ying>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wei_Zhu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xiangjie_Yi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yan_Wang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FA-SSCC58667.2023.10347955>
foaf:homepage <https://doi.org/10.1109/A-SSCC58667.2023.10347955>
dc:identifier DBLP conf/asscc/ZhuZYYWS23 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FA-SSCC58667.2023.10347955 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label A Hybrid Integrated W-Band 4-Element Phased-Array Transceiver Front-End Achieving 21.6% Full TX Peak PAE at 14.8dBm Output Power and <1¬į/dB Phase/Gain Resolution in 65-nm CMOS Technology. (xsd:string)
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jiazhi_Ying>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wei_Zhu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xiangjie_Yi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yan_Wang>
swrc:pages 1-3 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1109/A-SSCC58667.2023.10347955>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/asscc>
dc:title A Hybrid Integrated W-Band 4-Element Phased-Array Transceiver Front-End Achieving 21.6% Full TX Peak PAE at 14.8dBm Output Power and <1¬į/dB Phase/Gain Resolution in 65-nm CMOS Technology. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document