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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/async/YantchevHJN95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/C._G._Huang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ivailo_M._Nedelchev>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jelio_Todorov_Yantchev>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mark_B._Josephs>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FWCADM.1995.514639>
foaf:homepage <https://doi.org/10.1109/WCADM.1995.514639>
dc:identifier DBLP conf/async/YantchevHJN95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FWCADM.1995.514639 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Low-latency asynchronous FIFO buffers. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/C._G._Huang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ivailo_M._Nedelchev>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jelio_Todorov_Yantchev>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mark_B._Josephs>
swrc:pages 24-31 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/async/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/async/YantchevHJN95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/async/YantchevHJN95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/async/async1995.html#YantchevHJN95>
rdfs:seeAlso <https://doi.org/10.1109/WCADM.1995.514639>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/async>
dc:subject buffer circuits; pipeline processing; asynchronous circuits; low-latency asynchronous FIFO buffers; parallel asynchronous implementation; propagation delay; packet switching; interface circuitry; inter-chip communication wires; acknowledge signal; high-throughput multiple-burst signalling scheme (xsd:string)
dc:title Low-latency asynchronous FIFO buffers. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document