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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ats/Al-ArsG03>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ad_J._van_de_Goor>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zaid_Al-Ars>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FATS.2003.1250777>
foaf:homepage <https://doi.org/10.1109/ATS.2003.1250777>
dc:identifier DBLP conf/ats/Al-ArsG03 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FATS.2003.1250777 (xsd:string)
dcterms:issued 2003 (xsd:gYear)
rdfs:label Analyzing the Impact of Process Variations on DRAM Testing Using Border Resistance Traces. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ad_J._van_de_Goor>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zaid_Al-Ars>
swrc:pages 24-27 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ats/2003>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ats/Al-ArsG03/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ats/Al-ArsG03>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ats/ats2003.html#Al-ArsG03>
rdfs:seeAlso <https://doi.org/10.1109/ATS.2003.1250777>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ats>
dc:subject DRAMs, process variations, border resistance trace, defect simulation, memory testing (xsd:string)
dc:title Analyzing the Impact of Process Variations on DRAM Testing Using Border Resistance Traces. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document