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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ats/ChenLSC95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Beyin_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chung-Len_Lee_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jwu_E._Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wen-Zen_Shen>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FATS.1995.485313>
foaf:homepage <https://doi.org/10.1109/ATS.1995.485313>
dc:identifier DBLP conf/ats/ChenLSC95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FATS.1995.485313 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Fanout fault analysis for digital logic circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Beyin_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chung-Len_Lee_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jwu_E._Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wen-Zen_Shen>
swrc:pages 33-39 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ats/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ats/ChenLSC95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ats/ChenLSC95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ats/ats1995.html#ChenLSC95>
rdfs:seeAlso <https://doi.org/10.1109/ATS.1995.485313>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ats>
dc:subject combinational circuits; fault diagnosis; logic testing; sequential circuits; fanout fault analysis; digital logic circuits; fault collapsing; combinational benchmark circuits; sequential benchmark circuits; target faults; test generation; fault simulation (xsd:string)
dc:title Fanout fault analysis for digital logic circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document