Hardware-accelerated concurrent fault simulation: eventflow computing versus dataflow computing.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/ats/HahnHK95
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1995
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Hardware-accelerated concurrent fault simulation: eventflow computing versus dataflow computing.
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concurrent engineering; fault diagnosis; logic testing; discrete event simulation; circuit analysis computing; data flow computing; VLSI; automatic testing; integrated circuit testing; hardware-accelerated concurrent fault simulation; eventflow computing; dataflow computing; MuSiC; highly-parallel Munich Simulation Computer; logic simulation; compiler-driven simulation; selective trace simulation; test vectors; VLSI; automatic testing
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Hardware-accelerated concurrent fault simulation: eventflow computing versus dataflow computing.
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