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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ats/HuangOCW00>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chee-Kian_Ong>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Cheng-Wen_Wu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jing-Reng_Huang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kwang-Ting_Cheng>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FATS.2000.893602>
foaf:homepage <https://doi.org/10.1109/ATS.2000.893602>
dc:identifier DBLP conf/ats/HuangOCW00 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FATS.2000.893602 (xsd:string)
dcterms:issued 2000 (xsd:gYear)
rdfs:label An FPGA-based re-configurable functional tester for memory chips. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chee-Kian_Ong>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Cheng-Wen_Wu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jing-Reng_Huang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kwang-Ting_Cheng>
swrc:pages 51-57 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ats/2000>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ats/HuangOCW00/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ats/HuangOCW00>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ats/ats2000.html#HuangOCW00>
rdfs:seeAlso <https://doi.org/10.1109/ATS.2000.893602>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ats>
dc:subject integrated memory circuits; integrated circuit testing; reconfigurable architectures; re-configurable tester; memory chips; re-configurable hardware platform; compiler; prototype tester (xsd:string)
dc:title An FPGA-based re-configurable functional tester for memory chips. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document