Single-control testability of RTL data paths for BIST.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/ats/MasuzawaIWF00
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Single-control testability of RTL data paths for BIST.
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built-in self test; logic testing; integrated circuit testing; automatic test pattern generation; design for testability; VLSI; digital integrated circuits; single-control testability; RTL data paths; BIST method; hierarchical test; test pattern generators; response analyzers; DFT method; high fault coverage; single stuck-at faults; low hardware overhead; at-speed testing; transition faults; delay faults; ATPG; VLSI circuits
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Single-control testability of RTL data paths for BIST.
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