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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ats/WangL00>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kuen-Jong_Lee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wei-Lun_Wang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FATS.2000.893651>
foaf:homepage <https://doi.org/10.1109/ATS.2000.893651>
dc:identifier DBLP conf/ats/WangL00 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FATS.2000.893651 (xsd:string)
dcterms:issued 2000 (xsd:gYear)
rdfs:label Accelerated test pattern generators for mixed-mode BIST environments. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kuen-Jong_Lee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wei-Lun_Wang>
swrc:pages 368-373 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ats/2000>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ats/WangL00/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ats/WangL00>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ats/ats2000.html#WangL00>
rdfs:seeAlso <https://doi.org/10.1109/ATS.2000.893651>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ats>
dc:subject built-in self test; shift registers; mixed analogue-digital integrated circuits; integrated circuit testing; automatic test pattern generation; logic testing; integrated circuit economics; fault diagnosis; accelerated test pattern generators; mixed-mode BIST; linear feedback shift registers; pseudorandom patterns; deterministic patterns; scan-based built-in self-test; fault coverage; cost; scan chain; clock cycle; test pattern generator; multiple sub-chains; multiple sequence generator; test application time (xsd:string)
dc:title Accelerated test pattern generators for mixed-mode BIST environments. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document