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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ats/WangTJ01>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chun-Yao_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jing-Yang_Jou>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shing-Wu_Tung>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FATS.2001.990321>
foaf:homepage <https://doi.org/10.1109/ATS.2001.990321>
dc:identifier DBLP conf/ats/WangTJ01 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FATS.2001.990321 (xsd:string)
dcterms:issued 2001 (xsd:gYear)
rdfs:label An Improved AVPG Algorithm for SoC Design Verification Using Port Order Fault Model. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chun-Yao_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jing-Yang_Jou>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shing-Wu_Tung>
swrc:pages 431-436 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ats/2001>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ats/WangTJ01/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ats/WangTJ01>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ats/ats2001.html#WangTJ01>
rdfs:seeAlso <https://doi.org/10.1109/ATS.2001.990321>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ats>
dc:title An Improved AVPG Algorithm for SoC Design Verification Using Port Order Fault Model. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document