Identification of robust untestable path delay faults.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/ats/WuLC95
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1995
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Identification of robust untestable path delay faults.
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combinational circuits; fault diagnosis; logic testing; automatic testing; delays; logic partitioning; multivalued logic; signal flow graphs; logic CAD; robust untestable path delay faults; fault identification; path reconvergence of fanouts; ISCAS 85' circuits; total path delay faults; ATPG; combinational circuits; six-valued logic; propagation graph; ROUNTEST program; partitioning
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Identification of robust untestable path delay faults.
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