Hardware Transactional Memory Based on Abort Prediction and Adaptive Retry Policy for Multi-Core In-Memory Databases.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/bigcomp/KimKCYC18
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Hardware Transactional Memory Based on Abort Prediction and Adaptive Retry Policy for Multi-Core In-Memory Databases.
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Hardware Transactional Memory Based on Abort Prediction and Adaptive Retry Policy for Multi-Core In-Memory Databases.
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