[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/bigda/SenthilkumarAGD23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/B._Gayathri>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/E._Avantika>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/K._K._Senthilkumar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vaithiyanathan_Dhandapani>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-031-58502-9%5F7>
foaf:homepage <https://doi.org/10.1007/978-3-031-58502-9_7>
dc:identifier DBLP conf/bigda/SenthilkumarAGD23 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-031-58502-9%5F7 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label VLSI Implementation of Reconfigurable Canny Edge Detection Algorithm. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/B._Gayathri>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/E._Avantika>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/K._K._Senthilkumar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vaithiyanathan_Dhandapani>
swrc:pages 110-119 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/bigda/2023a>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/bigda/SenthilkumarAGD23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/bigda/SenthilkumarAGD23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/bigda/bigda2023a.html#SenthilkumarAGD23>
rdfs:seeAlso <https://doi.org/10.1007/978-3-031-58502-9_7>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/bigda>
dc:title VLSI Implementation of Reconfigurable Canny Edge Detection Algorithm. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document