Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/cases/MarongiuBK07
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2007
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Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms.
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MPSoCs, barrier synchronization, code parallelization
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Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms.
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