Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/cases/YangKPKH07
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2007
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Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems.
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dual-port SDRAM, memory architecture, mobile embedded system
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Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems.
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